라즈베리 파이 3b
| $ cat /proc/cpuinfo processor : 0 BogoMIPS : 38.40 Features : fp asimd evtstrm crc32 cpuid CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x0 CPU part : 0xd03 CPU revision : 4 |
odroid-c2
| $ cat /proc/cpuinfo processor : 0 BogoMIPS : 2.00 Features : fp asimd crc32 CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x0 CPU part : 0xd03 CPU revision : 4 |
소스코드
| #include <stdint.h> #include "timer.h" void main() { opal_sys_timer_freq(); } |
#ifndef OPAL_SYS_ARCH_TIMER_H #define OPAL_SYS_ARCH_TIMER_H 1 #include <sys/times.h> typedef uint64_t opal_timer_t; static inline opal_timer_t opal_sys_timer_get_cycles(void) { opal_timer_t ret; __asm__ __volatile__ ("isb" ::: "memory"); __asm__ __volatile__ ("mrs %0, CNTVCT_EL0" : "=r" (ret)); return ret; } static inline opal_timer_t opal_sys_timer_freq(void) { opal_timer_t freq; __asm__ __volatile__ ("mrs %0, CNTFRQ_EL0" : "=r" (freq)); return (opal_timer_t)(freq); } #define OPAL_HAVE_SYS_TIMER_GET_CYCLES 1 #endif /* ! OPAL_SYS_ARCH_TIMER_H */ |
실행파일 디스어셈블
| 0000000000000724 <opal_sys_timer_freq>: 724: d10043ff sub sp, sp, #0x10 728: d53be000 mrs x0, cntfrq_el0 72c: f90007e0 str x0, [sp, #8] 730: f94007e0 ldr x0, [sp, #8] 734: 910043ff add sp, sp, #0x10 738: d65f03c0 ret |
라즈베리 파이(좌), odroid-c2(우)
| (gdb) r Starting program: /home/pi/src/a.out [Inferior 1 (process 2762) exited normally] |
(gdb) r Starting program: /root/src/a.out Program received signal SIGILL, Illegal instruction. 0x0000005555555720 in opal_sys_timer_freq () |
| MRS Move the contents of the CPSR or SPSR to a general-purpose register. Usage Use MRS in combination with MSR as part of a read-modify-write sequence for updating a PSR, for example to change processor mode, or to clear the Q flag. Caution You must not attempt to access the SPSR when the processor is in User or System mode. This is your responsibility. The assembler cannot warn you about this as it does not know what processor mode code will be executed in. Architectures This instruction is available in ARM architecture versions 3 and above. |
| MSR Load specified fields of the CPSR or SPSR with an immediate constant, or from the contents of a general-purpose register. Architectures This instruction is available in ARM architecture versions 3 and above. |
| Saved Process Status Register |
| AArch64 (ARM64)에서는 ARMv7의 CPSR (Current Program Status Register)과 directly 연결되는 개념을 갖고 있지 않다. 그 대신 AArch64에서는 CPSR field의 각 값을 PSTATE로 정의하였다. |
[링크 : https://gongpd.tistory.com/9]
EL이라는 것에 따라서 PSR 접근이 달라지는 거라면.. 명령어도 illegal이 될 수 있으려나?
[링크 : https://developer.arm.com/documentation/den0024/a/ARMv8-Registers/AArch64-special-registers]
| EL0 = ARMv7의 User 모드 EL1 = ARMv7의 Supervisor 모드(커널 코드 실행) EL2 = 하이퍼바이저 모드(하이퍼바이저 실행) EL3 = Secure 모드(트러스트 존 실행) |
[링크 : https://blog.naver.com/crushhh/222093330435]
분위기를 보아하니.. cpu ring level(privilige mode) 에 따라서 접근 가능한 레지스터가 바뀌는데
그러면서 특정 명령어가 사용불능이 되기도 하는건가 싶은데
| 라즈베리 파이 3b / 64 | odroid c2 |
| $ uname -a Linux raspberrypi 6.1.21-v8+ #1642 SMP PREEMPT Mon Apr 3 17:24:16 BST 2023 aarch64 GNU/Linux |
# uname -a Linux odroid 3.16.85-65 #1 SMP PREEMPT Mon Jan 18 13:32:38 UTC 2021 aarch64 aarch64 aarch64 GNU/Linux |
설마 커널 버전에 따른 atf 혹은 el 설정방법 차이나 누락으로 인해 이런 문제가 발생하는건가?
시간나면 odroid-c2용 armbian 으로 시도해봐야겠다. 커널 버전이 너무 차이나네..
| Armbian 23.8 Bookworm Kernel 6.1, Size: 467Mb, Release date: Aug 31, 2023 |
[링크 : https://www.armbian.com/odroid-c2/]
+
걍 armbian 하니 잘 된다. 커널 버전이나 aarch64 지원이 미흡한 구버전 커널이라 그럴수도 있을 듯 하다.
| minimonk@odroidc2:~$ mpirun -------------------------------------------------------------------------- mpirun could not find anything to do. It is possible that you forgot to specify how many processes to run via the "-np" argument. -------------------------------------------------------------------------- |
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