AVR ATmega128 i2c

AVR 에서도 I2C는 open drain으로 구성되는데
i2c 기능을 사용하지 않고,  GPIO로 구성해서 i2c 통신을 할 경우에는
i2c 버스 풀업과 avr pin 내장 풀업으로 인해 모종의 문제가 발생하는 듯하다.

• INT1/SDA – Port D, Bit 1 INT1, External Interrupt source 1. The PD1 pin can serve as an external interrupt source to the MCU. SDA, Two-wire Serial Interface Data: When the TWEN bit in TWCR is set (one) to enable the Two-wire Serial Interface, pin PD1 is disconnected from the port and becomes the Serial Data I/O pin for the Two-wire Serial Interface. In this mode, there is a spike filter on the pin to sup- press spikes shorter than 50 ns on the input signal, and the pin is driven by an open drain driver with slew-rate limitation.   •INT0/SCL – Port D, Bit 0 INT0, External Interrupt source 0. The PD0 pin can serve as an external interrupt source to the MCU. SCL, Two-wire Serial Interface Clock: When the TWEN bit in TWCR is set (one) to enable the Two-wire Serial Interface, pin PD0 is disconnected from the port and becomes the Serial Clock I/O pin for the Two-wire Serial Interface. In this mode, there is a spike filter on the pin to sup- press spikes shorter than 50 ns on the input signal, and the pin is driven by an open drain driver with slew-rate limitation.

Electrical Interconnection As depicted in Figure 86, both bus lines are connected to the positive supply voltage through pull-up resistors. The bus drivers of all TWI-compliant devices are open-drain or open-collector. This implements a wired-AND function which is essential to the operation of the interface. A low level on a TWI bus line is generated when one or more TWI devices output a zero. A high level is output when all TWI devices tri-state their outputs, allowing the pull-up resistors to pull the line high. Note that all AVR devices connected to the TWI bus must be powered in order to allow any bus operation.  The number of devices that can be connected to the bus is only limited by the bus capacitance limit of 400 pF and the 7-bit slave address space. A detailed specification of the electrical char- acteristics of the TWI is given in “Two-wire Serial Interface Characteristics” on page 322. Two different sets of specifications are presented there, one relevant for bus speeds below 100 kHz, and one valid for bus speeds up to 400 kHz.