Internal configuration access includes the ICAP (all devices), PCAP (Zynq-7000 SoC devices), and MCAP (UltraScale and UltraScale+ devices through PCIe).
2. Executable code is stored in the EPCS. This is according to your second attempt:
--- Quote Start --- I changed the reset vector to EPCS controller, it still doesn't work --- Quote End ---
In this case the epcs_flash_controller is nesessary in your system. The reset vector must point to the epcs_flash_controller, which contains the bootcopier code. The exeption vector must point to On-Chip RAM because your .text segment is still located there. After power is up, NiosII start the execution of the bootcopier code from epcs_flash_controller internal ROM. This bootcopier gets application executible code from EPCS and stores it into On-Chip RAM. After bootcopier has finished its work the control passes to the application executible code in the On-Chip RAM.
1.5.5. Nios II Processor Application Copied from EPCS Flash to RAM Using Boot Copier The EPCS address space is not mapped into the Altera Avalon EPCS Flash Controller’s Avalon MM slave interface. Instead, read or write accesses are done through CSRs. Upon system reset, the EPCS device needs to be initialized before usage.
For these reasons, the EPCS controller-based boot copier is required for initializing the EPCS device and copying the Nios II application to RAM for execution.
The EPCS controller instantiates a block of boot ROM internally at its base address (offset 0x0, just before EPCS controller’s CSRs) for storing the boot copier. Nios II reset vector offset must set to EPCS controller base address, such that upon system reset the boot copier is executed first to initialize the EPCS controller and device.
설명 직렬 플래시 컨트롤러 II IP와 함께 Nios II 플래시 프로그래머(현재 "quartus_pgm --nios2")를 디자인에 사용할 때 명령 문자열에 새로운 옵션 "--csr"를 지정해야 합니다.
해결 방법 --csr 옵션은 직렬 플래시 컨트롤러 II IP 코어의 "avl_csr" 인터페이스 주소로 지정되어야 합니다. 예를 들어 플랫폼 디자이너 시스템에서 "avl_csr" 인터페이스의 주소 범위가 0x1000_0000 0x1000_003F 경우 "--csr=0x10000000"을 사용하십시오.
이 기능은 Nios II 플래시 프로그래머 사용자 가이드의 향후 버전에서 완전히 문서화될 것으로 예상됩니다.
For i.MX 8M EVK, to build imx-boot image by using imx-mkimage, perform the following steps: 1. Copy and rename mkimage from u-boot/tools/mkimage to imx-mkimage/iMX8M/mkimage_uboot. 2. Copy u-boot-spl.bin from u-boot/spl/u-boot-spl.bin to imx-mkimage/iMX8M/. 3. Copy u-boot-nodtb.bin from u-boot/u-boot-nodtb.bin to imx-mkimage/iMX8M/. 4. Copy imx8mq-evk.dtb (for i.MX 8M Quad EVK), imx8mm-evk.dtb (for i.MX 8M Mini LPDDR4 EVK), imx8mm-ddr4-evk.dtb (for i.MX 8M Mini DDR4 EVK), or imx8mp-evk.dtb (for i.MX 8M Plus LPDDR4 EVK) from u-boot/arch/arm/dts/ to imx-mkimage/iMX8M/. 5. Copy bl31.bin from Arm Trusted Firmware (imx-atf) to imx-mkimage/iMX8M/. 6. Copy firmware/hdmi/cadence/signed_hdmi_imx8m.bin from the firmware-imx package to imx-mkimage/iMX8M/. 7. For i.MX 8M Quad and i.MX 8M Mini LPDDR4 EVK, copy lpddr4_pmu_train_1d_dmem.bin, lpddr4_pmu_train_1d_imem.bin, lpddr4_pmu_train_2d_dmem.bin, and lpddr4_pmu_train_2d_imem.bin from firmware/ddr/synopsys of the firmware-imx package to imx-mkimage/ iMX8M/. For i.MX 8M Mini DDR4 EVK, copy ddr4_imem_1d.bin, ddr4_dmem_1d.bin, ddr4_imem_2d.bin, and ddr4_dmem_2d.bin from firmware/ddr/synopsys of the firmware-imx package to imx-mkimage/iMX8M. For i.MX 8M Plus LPDDR4 EVK, copy lpddr4_pmu_train_1d_dmem_201904.bin, lpddr4_pmu_train_1d_imem_201904.bin, lpddr4_pmu_train_2d_dmem_201904.bin, and lpddr4_pmu_train_2d_imem_201904.bin from firmware/ddr/synopsys of the firmware-imx package to imx-mkimage/iMX8M/. 8. For i.MX 8M Quad EVK, run make SOC=iMX8M flash_evk to generate flash.bin (imx-boot image) with HDMI FW included. For i.MX 8M Mini LPDDR4 EVK, run make SOC=iMX8MM flash_evk to generate flash.bin (imx-boot image). For i.MX 8M Mini DDR4 EVK, run make SOC=iMX8MM flash_ddr4_evk to generate flash.bin (imx-boot image). For i.MX 8M Plus LPDDR4 EVK, run make SOC=iMX8MP flash_evk to generate flash.bin (imx-boot-image). To boot with eMMC fasboot on i.MX 8M Quad EVK and i.MX 8M Mini LPDDR4 EVK, use flash_evk_emmc_fastboot target.
./nxp/imx8plus/cortex-m7/SDK_2_13_0_EVK-MMP/boards/evkmimx8mp/demo_apps/hello_world/armgcc$ ./build_all.sh CMake Error at /home/falinux/바탕화면/nxp/imx8plus/cortex-m7/SDK_2_13_0_EVK-MIMX8MP/tools/cmake_toolchain_files/armgcc.cmake:16 (MESSAGE): ***Please set ARMGCC_DIR in envionment variables*** Call Stack (most recent call first): /usr/share/cmake-3.10/Modules/CMakeDetermineSystem.cmake:91 (include) CMakeLists.txt:10 (ENABLE_LANGUAGE)
아래와 같이 추가해주면 일단 빌드가 문제없이 된다.
$ export ARMGCC_DIR=/usr
imx8 SD 카드의 boot 파티션에 release/hello_world.bin 을 복사해서 넣고
아래의 문장을 uboot 에서 따라하면
If the hello_world.bin is made from the debug/release target, which means the binary file will run at TCM, use the following commands to boot: • fatload mmc 1:1 0x48000000 hello_world.bin;cp.b 0x48000000 0x7e0000 20000; • bootaux 0x7e0000
출처 : Getting Started with MCUXpresso SDK for EVK-MIMX8MP
아래와 같이 /dev/ttyUSB3 포트를 통해서 hello world. 가 출력된다.
다만.. 이녀석은 TCM 에서 빌드되어 실행되기로 상정(?)된 파일이기 때문에 리눅스의 sysfs를 통해서 실행하려면
어떤 바이너리를 통해 실행해야 하려나?
b. If the hello_world.bin is made from the ddr_debug/ddr_release target, which means the binary file runs at DRAM, use the following commands: • fatload mmc 1:1 0x80000000 hello_world.bin • dcache flush • bootaux 0x80000000
c. If the hello_world.bin is made from the flash_debug/flash_release target, which means the binary file runs at QSPI/XIP, use the following commands: • sf probe • sf read 0x80000000 0 4 • fatload mmc 1:1 0x80000000 flash.bin • dcache flush • sf erase 0 0x100000 • sf write 0x48000000 0 0x100000 • bootaux 0x8000000
Note: If the Linux OS kernel runs together with M7, make sure the correct dtb file is used. This dtb file reserves resources used by M7 and avoids the Linux kernel from configuring them. Use the following command in U-Boot before running the kernel: setenv fdtfile ‘imx8mp-evk-rpmsg.dtb’
